MSc.Thesis Defense:FENS Grad Office

FPGA IMPLEMENTATION OF DEEP NEURAL NETWORKS (DNN) FOR FASTINFERENCE AND ERROR RESILIENCE ANALYSIS

Uğur Berk ÇELİK

Electronics Engineering, MSc. Thesis, 2024

Thesis Jury

Assoc. Prof. Ömer CEYLAN (Thesis Advisor), Assoc. Prof. Öznur TAŞTAN

 Assoc. Prof. Atilla UYGUR

Date & Time: 24th July, 2024 – 15:00 AM

Place: FENS L067
Keywords : Deep Learning, Convolutional Neural Networks, Error Injection

Abstract

Deep learning, a subset of machine learning, has revolutionized numerous fields with its ability to model complex patterns and make highly accurate predictions. Deep neural networks (DNNs) excels in tasks that require processing vast amounts of data such as healthcare, autonomous driving and finance. As DNNs are increasingly deployed in critical applications, ensuring their reliability and robustness becomes paramount. Error resilience refers to a network's ability to maintain acceptable performance despite encountering faults or errors. These errors can stem from various sources, including hardware defects, environmental conditions, and operational stresses. Deploying DNNs on resource-constrained devices, such as mobile phones, edge devices, and embedded systems, presents unique challenges due to limited computational power, memory, and energy availability. Exploiting the error resilience of DNNs can significantly enhance energy efficiency for resource-constrained.

This thesis introduces an error injection framework aimed to evaluate the resilience of convolutional neural networks (CNNs) to bit-level faults. This framework employs a 2D error matrix format to achieve error injection at both the per-bit and per-layer levels. The dimensions of the matrix align with the number of error injection layers (rows) and the quantization bit width (columns). Each element in the matrix represents the bit error rate for a specific layer and bit position, allowing for precise and detailed error simulation.